1. Field of Invention
The present invention relates to a printed circuit board package structure and a manufacturing method thereof.
2. Description of Related Art
Generally, during the manufacturing processes of the circuit boards, specific elements are required to be located into a predetermined containing groove of the circuit board, such as the cooling cooper block and the cooling iron core. The iron core can be applied into the structure of the transformer or the structure of the power choke since the iron core is with magnetism. Because the magnetic elements are very sensitive to the stress, the electrical characteristics of the magnetic elements may be degraded or damaged due to the environmental stress; both the conventional manufacturing processes and package structures would lead to the stress which impacts the inductance value.
Conventional circuit boards are package structures with four layers, and the circuit boards use the Copper Clad Laminate (CCL) as the substrates, where both the front side and the back side of a CCL are covered by cooper. When making the four-layer circuit board, firstly the cooper on the front side of the substrate is patterned, and then the forming machine is used to form a containing groove at the front side of the substrate. Then all the copper on the back side of the substrate is removed by etching, and the iron core is placed into the containing groove. After that the containing groove is then filled by adhesive, and the copper foil then is laminated on both the front side and back side of the substrate. Between the copper foil and the substrate, the glass fiber (FR4) or polypropylene (PP) is used as the adhesive layer. Next, by the manufacturing processes such as drilling holes, coopering on the surface of the holes, and filling the epoxy resin, the channel (via) for conducting the cooper foil on the both front side and back side of the substrate is formed. Thereafter, the cooper foil on the both front side and back side are patterned, and, at both the front side and back side of the substrate, the epoxy resin is used to cover the patterned copper foil and the adhesive layer.
However, before laminating the copper foil on the back side of the substrate, all the cooper on the back side of the CCL is needed to be removed by etching, resulting in the waste of both the material and the cost of the process time, and the thickness of the copper foil is smaller than the copper on the back side of the substrate, thereby reducing the structure strength of the four-layer circuit board and leading to the stress which impacts the inductance value.
In addition, later when the circuit board is under the process of Surface Mount Technology (SMT), in the IR Reflow, the gas at the containing groove easily expands due to the high temperature, thereby leading to the adhesive layer and the epoxy resin covered on the substrate be damaged; unless the adhesive with high quality is used, but if designers do so, the usage of the high quality adhesive will result in the increasing cost. On the other hand, the material of the substrate is glass fiber, in the conventional process for forming the via, it is easily to be regardless that the locations of the adjacent channels may be parallel with the direction of the glass fiber of the substrate. In this way, the distance between the adjacent channels along the glass fiber is at the shortest, thereby the cracks of the adjacent channels which were formed under drilling holes on the substrate will be easily make the adjacent channels connected to each other along the glass fiber, making the copper on the surface of the adjacent channels would conduct due to the cracks and lead to the short circuit.